Sciweavers

85 search results - page 11 / 17
» Synthesizable High Level Hardware Descriptions
Sort
View
ACSAC
2003
IEEE
14 years 4 months ago
MLS-PCA: A High Assurance Security Architecture for Future Avionics
1 DOD Joint Vision 2020 (JV2020) is the integrated multi-service planning document for conduct among coalition forces of future warfare. It requires the confluence of a number of k...
Clark Weissman
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 3 months ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...
ISSS
1995
IEEE
121views Hardware» more  ISSS 1995»
14 years 2 months ago
A comprehensive estimation technique for high-level synthesis
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
Seong Yong Ohm, Fadi J. Kurdahi, Nikil Dutt, Min X...
ITC
1998
IEEE
174views Hardware» more  ITC 1998»
14 years 3 months ago
High volume microprocessor test escapes, an analysis of defects our tests are missing
This paper explores defects found in a high volume microprocessor when shipping at a low defect level. A brief description of the manufacturing flow along with definition of DPM i...
Wayne M. Needham, Cheryl Prunty, Yeoh Eng Hong
ACSD
2001
IEEE
112views Hardware» more  ACSD 2001»
14 years 2 months ago
Software Implementation of Synchronous Programs
Synchronous languages allow a high level, concurrent, and deterministic description the behavior of reactive systems. Thus, they can be used advantageously for the programming of ...
Charles Andre, Frédéric Boulanger, A...