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CONIELECOMP
2011
IEEE
13 years 2 months ago
FPGA design and implementation for vertex extraction of polygonal shapes
This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduce...
Jorge Martínez-Carballido, Jorge Guevara-Es...
ICASSP
2011
IEEE
13 years 2 months ago
Pitch transposition and breathiness modification using a glottal source model and its adapted vocal-tract filter
The transformation of the voiced segments of a speech recording has many applications such as expressivity synthesis or voice conversion. This paper addresses the pitch transposit...
Gilles Degottex, Axel Röbel, Xavier Rodet
DATE
2003
IEEE
138views Hardware» more  DATE 2003»
14 years 4 months ago
Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric
There have been several recent attempts to include duplication-based on-line testability in behaviourally synthesized designs. In this paper, on-line testability is considered wit...
Petros Oikonomakos, Mark Zwolinski, Bashir M. Al-H...
DAC
2000
ACM
14 years 11 months ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski
ICCAD
1995
IEEE
120views Hardware» more  ICCAD 1995»
14 years 2 months ago
Pattern generation for a deterministic BIST scheme
Recently a deterministic built-in self-test scheme has been presented based on reseeding of multiple-polynomial linear feedback shift registers. This scheme encodes deterministic ...
Sybille Hellebrand, Birgit Reeb, Steffen Tarnick, ...