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VLSI
2005
Springer
14 years 1 months ago
Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits
Quasi delay insensitive circuits are functionally independent of delays in gates and wires (except for some particular wires). Such asynchronous circuits offer high robustness but...
Bertrand Folco, Vivian Brégier, Laurent Fes...
DATE
2006
IEEE
86views Hardware» more  DATE 2006»
14 years 1 months ago
Synthesis of system verilog assertions
In recent years, Assertion-Based Verification is being widely accepted as a key technology in the pre-silicon validation of system-on-chip(SOC) designs. The System Verilog langua...
Sayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P....
DATE
2003
IEEE
122views Hardware» more  DATE 2003»
14 years 29 days ago
Synthesis of Complex Control Structures from Behavioral SystemC Models
In this paper we present the results of a set of experiments we conducted in order to evaluate the viability of the behavioral synthesis, relying on the tools available at the mom...
Francesco Bruschi, Fabrizio Ferrandi
ICCHP
2010
Springer
13 years 11 months ago
Design and Development of Spoken Dialog Systems Incorporating Speech Synthesis of Viennese Varieties
Abstract. This paper describes our work on the design and development of a spoken dialog system, which uses synthesized speech of various different Viennese varieties. In a previo...
Michael Pucher, Friedrich Neubarth, Dietmar Schabu...
ICIP
2007
IEEE
13 years 9 months ago
Rendering-Oriented Decoding for Distributed Multi-View Coding System
This paper discusses a system in which multi-view images are captured and encoded in a distributed fashion and a viewer synthesizes a novel view from this data. We developed an ef...
Yuichi Taguchi, Takeshi Naemura