Quasi delay insensitive circuits are functionally independent of delays in gates and wires (except for some particular wires). Such asynchronous circuits offer high robustness but...
In recent years, Assertion-Based Verification is being widely accepted as a key technology in the pre-silicon validation of system-on-chip(SOC) designs. The System Verilog langua...
Sayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P....
In this paper we present the results of a set of experiments we conducted in order to evaluate the viability of the behavioral synthesis, relying on the tools available at the mom...
Abstract. This paper describes our work on the design and development of a spoken dialog system, which uses synthesized speech of various different Viennese varieties. In a previo...
Michael Pucher, Friedrich Neubarth, Dietmar Schabu...
This paper discusses a system in which multi-view images are captured and encoded in a distributed fashion and a viewer synthesizes a novel view from this data. We developed an ef...