10159 search results - page 50 / 2032 » System Design Validation Using Formal Models |
WOSP
2000
ACM
14 years 10 days ago
2000
ACM
In this paper we present a formal approach to analyse performance for distributed systems, which is integrated in the early stages of the software development process. We propose ...
IFIP
2000
Springer
13 years 11 months ago
2000
Springer
The validation of functional and real-time requirements of control software for embedded systems is a difficult task. It usually needs the electronic control unit (ECU) and the co...
IADIS
2004
13 years 9 months ago
2004
We have designed and deployed a system that uses X.509 public-key certificates (PKC) and attribute certificates (AC) for access control. This includes an authorization service for...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...
ECBS
2006
IEEE
13 years 11 months ago
2006
IEEE
We present in this paper a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. This paradigm reli...