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LPNMR
2009
Springer
14 years 2 months ago
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs
Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
Harold Ishebabi, Philipp Mahr, Christophe Bobda, M...
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
13 years 11 months ago
Analyzing On-Chip Communication in a MPSoC Environment
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
Mirko Loghi, Federico Angiolini, Davide Bertozzi, ...
CODES
2004
IEEE
13 years 11 months ago
Benchmark-based design strategies for single chip heterogeneous multiprocessors
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs trad...
JoAnn M. Paul, Donald E. Thomas, Alex Bobrek
ERSA
2007
177views Hardware» more  ERSA 2007»
13 years 9 months ago
Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 1 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...