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ISSS
1996
IEEE
129views Hardware» more  ISSS 1996»
14 years 1 months ago
Hardware/Software Partitioning with Iterative Improvement Heuristics
The paper presents two heuristics for hardware/software partitioning of system level specifications. The main objective is to achieve performance optimization with a limited hardw...
Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alex ...
CODES
2001
IEEE
14 years 23 days ago
A practical tool box for system level communication synthesis
This paper presents a practical approach to communication synthesis for hardware/software system specified as tasks communicating through lossless blocking channels. It relies on ...
Denis Hommais, Frédéric Pétro...
ISSS
2002
IEEE
133views Hardware» more  ISSS 2002»
14 years 2 months ago
Efficient Simulation of Synthesis-Oriented System Level Designs
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...
Rajesh K. Gupta, Sandeep K. Shukla, Nick Savoiu
3DIC
2009
IEEE
146views Hardware» more  3DIC 2009»
14 years 4 months ago
A routerless system level interconnection network for 3D integrated systems
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...
Kelli Ireland, Donald M. Chiarulli, Steven P. Levi...
WSC
2008
13 years 11 months ago
Architecture for modeling, simulation, and execution of PLC based manufacturing system
In this paper, we propose an integrated architecture for modeling, simulation, and execution of PLC (Programmable Logic Controller) based manufacturing system. The main objective ...
Devinder Thapa, Chang Mok Park, Kwan Hee Han, Sang...