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» System and Framework for QA of Process Design Kits
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ISPASS
2009
IEEE
14 years 3 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
AINA
2007
IEEE
14 years 3 months ago
Multi-Stage Real Time Health Monitoring via ZigBee in Smart Homes
We present a framework for a wireless health monitoring system within a smart home using ZigBee technology. Vital signals are collected and processed using a 3-tiered architecture...
S. Dagtas, G. Pekhteryev, Zafer Sahinoglu
ADVIS
2006
Springer
14 years 2 months ago
Validation of XML Documents: From UML Models to XML Schemas and XSLT Stylesheets
The widespread use of XML brings out the need of ensuring the validity of XML data. The use of languages such as XML Schema makes easier the process of verification of XML documen...
Eladio Domínguez, Jorge Lloret, Angel Luis ...
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
14 years 2 months ago
Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction
Assessing IC manufacturing process fluctuations and their impacts on IC interconnect performance has become unavoidable for modern DSM designs. However, the construction of parame...
Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, S...
MIR
2005
ACM
138views Multimedia» more  MIR 2005»
14 years 2 months ago
Evaluation strategies for image understanding and retrieval
We address evaluation of image understanding and retrieval large scale image data in the context of three evaluation projects. The first project is a comprehensive strategy for e...
Keiji Yanai, Nikhil V. Shirahatti, Prasad Gabbur, ...