60 search results - page 9 / 12 » System level clock tree synthesis for power optimization |
DAC
1997
ACM
13 years 11 months ago
1997
ACM
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
ASPDAC
2008
ACM
13 years 8 months ago
2008
ACM
In this paper we present a mathematical programming formulation of the integer time budgeting problem for directed acyclic graphs. In particular, we formally prove that our constr...
ASPDAC
1995
ACM
13 years 10 months ago
1995
ACM
In this paper we describe, a powerful post-synthesis approach called reclocking, for performance improvement by minimizing the total execution time. By back annotating the wire del...
MICRO
2008
IEEE
14 years 1 months ago
2008
IEEE
Any architectural optimization aims at satisfying the end user. However, modern architectures execute with little to no knowledge about the individual user. If architectures could...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...