Sciweavers

5744 search results - page 23 / 1149
» System level design, a VHDL based approach
Sort
View
ICCAD
2001
IEEE
106views Hardware» more  ICCAD 2001»
16 years 2 months ago
System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels
This paper presents a new methodology for system-level power and performance analysis of wireless multimedia systems. More precisely, we introduce an analytical approach based on ...
Radu Marculescu, Amit Nandi, Luciano Lavagno, Albe...
APPT
2007
Springer
16 years 1 days ago
Domain Level Page Sharing in Xen Virtual Machine Systems
The memory size limits the scalability of virtual machine systems. There have been some researches about sharing identical pages among guest systems to reduce memory usage. However...
Myeongjae Jeon, Euiseong Seo, Junghyun Kim, Joonwo...
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
15 years 11 months ago
Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi,...
ISQED
2006
IEEE
118views Hardware» more  ISQED 2006»
15 years 12 months ago
Language-Based High Level Transaction Extraction on On-chip Buses
Abstract— With the increasing in silicon densities, SoC designs are the stream in modern electronics systems. Accordingly, the verification for SoC designs is crucial. One of th...
Yi-Le Huang, Chun-Yao Wang, Richard Yeh, Shih-Chie...
FMAM
2010
157views Formal Methods» more  FMAM 2010»
15 years 3 months ago
An Experience on Formal Analysis of a High-Level Graphical SOA Design
: In this paper, we present the experience gained with the participation in a case study in which a novel high-level design language (UML4SOA) was used to produce a service-oriente...
Maurice H. ter Beek, Franco Mazzanti, Aldi Sulova