169 search results - page 11 / 34 » System level memory optimization for hardware-software co-de... |
LCPC
2004
Springer
14 years 1 months ago
2004
Springer
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
KIVS
2009
Springer
14 years 3 months ago
2009
Springer
We present an integrated approach for supporting in-network sensor data processing in dynamic and heterogeneous sensor networks. The concept relies on data stream processing techni...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
Code density is an important issue in memory constrained systems. Some RISC processor, e.g. the THUMB extension in the ARM processor, supports aggressive code size reduction even ...
MTDT
2003
IEEE
14 years 1 months ago
2003
IEEE
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
3DIC
2009
IEEE
14 years 1 months ago
2009
IEEE
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...