169 search results - page 13 / 34 » System level memory optimization for hardware-software co-de... |
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
Virtual platform (ViP), or ESL (Electronic System Level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case stud...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
In this paper, we investigate the impact of Tox and Vth on power performance trade-offs for on-chip caches. We start by examining the optimization of the various components of a s...
DATE
2010
IEEE
13 years 7 months ago
2010
IEEE
—Model-Based Development (MBD) provides an al level of abstraction, the model, which lets engineers focus on the business aspect of the developed system. MBD permits automatic tr...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
Security is gaining increasing relevance in the development of embedded devices. Towards a secure system at each level of design, this paper addresses the security aspects related...