Sciweavers

169 search results - page 23 / 34
» System level memory optimization for hardware-software co-de...
Sort
View
PC
2002
114views Management» more  PC 2002»
13 years 8 months ago
Optimizing noncontiguous accesses in MPI-IO
The I/O access patterns of many parallel applications consist of accesses to a large number of small, noncontiguous pieces of data. If an application's I/O needs are met by m...
Rajeev Thakur, William Gropp, Ewing L. Lusk
CODES
2005
IEEE
14 years 2 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
CODES
2009
IEEE
14 years 3 months ago
An on-chip interconnect and protocol stack for multiple communication paradigms and programming models
A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The d...
Andreas Hansson, Kees Goossens
LCPC
2005
Springer
14 years 1 months ago
Optimizing Packet Accesses for a Domain Specific Language on Network Processors
Programming network processors remains a challenging task since their birth until recently when high-level programming environments for them are emerging. By employing domain speci...
Tao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Ro...
ISCA
1996
IEEE
126views Hardware» more  ISCA 1996»
14 years 18 days ago
Memory Bandwidth Limitations of Future Microprocessors
This paper makes the case that pin bandwidth will be a critical consideration for future microprocessors. We show that many of the techniques used to tolerate growing memory laten...
Doug Burger, James R. Goodman, Alain Kägi