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ISSS
2002
IEEE
144views Hardware» more  ISSS 2002»
14 years 14 days ago
A Visual Approach to Validating System Level Designs
This paper proposes a simulation-based methodology for validation of a system under design in an early phase of development. The key element of this approach is the visual speci...
Jürgen Ruf, Thomas Kropf, Jochen Klose
DSD
2006
IEEE
110views Hardware» more  DSD 2006»
14 years 1 months ago
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
Ines Viskic, Rainer Dömer
SAMOS
2007
Springer
14 years 1 months ago
Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration
The Sesame modeling and simulation framework aims at early and thus efficient system-level design space exploration of embedded multimedia system architectures. So far, Sesame onl...
Mark Thompson, Andy D. Pimentel
ISSS
2002
IEEE
130views Hardware» more  ISSS 2002»
14 years 14 days ago
System-Level Modeling of a Network Switch SoC
We present the modeling of the high-level design of a next generation network switch from the perspective of a ComputerAided Design (CAD) team within the larger context of a desig...
Andrew S. Cassidy, Christopher P. Andrews, Donald ...
TC
1998
13 years 7 months ago
Using System-Level Models to Evaluate I/O Subsystem Designs
—We describe a system-level simulation model and show that it enables accurate predictions of both I/O subsystem and overall system performance. In contrast, the conventional app...
Gregory R. Ganger, Yale N. Patt