93 search results - page 14 / 19 » System-level memory modeling for bus-based memory architectu... |
RTAS
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--Modern computing systems have adopted multicore architectures and multiprocessor systems on chip (MPSoCs) for accommodating the increasing demand on computation power. Ho...
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
DAC
2011
ACM
12 years 8 months ago
2011
ACM
Just as electronic systems implement computation in terms of voltage (energy per unit charge), molecular systems compute in terms of chemical concentrations (molecules per unit vo...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper proposes the study of a new computation model that attempts to address the underlying sources of performance degradation (e.g. latency, overhead, and starvation) and th...