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» System-level power estimation and optimization
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DAC
1997
ACM
14 years 1 months ago
A Power Estimation Framework for Designing Low Power Portable Video Applications
This paper presents a power evaluation framework designed for estimating power consumption of a new video telephone compression standard, ITU-H.263, at the system level. A hierarc...
Chi-Ying Tsui, Kai-Keung Chan, Qing Wu, Chih-Shun ...
CODES
2008
IEEE
13 years 9 months ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
ISLPED
1996
ACM
101views Hardware» more  ISLPED 1996»
14 years 1 months ago
High-level power estimation
The growing demand for portable electronic devices has led to an increased emphasis on power consumption within the semiconductor industry. As a result, designers are now encourag...
Paul E. Landman
CODES
2005
IEEE
14 years 3 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan
DAC
1995
ACM
14 years 1 months ago
A Survey of Optimization Techniques Targeting Low Power VLSI Circuits
—We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are cons...
Srinivas Devadas, Sharad Malik