82 search results - page 3 / 17 » SystemC transaction level models and RTL verification |
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
ISCAS
2003
IEEE
14 years 24 days ago
2003
IEEE
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper gives an overview of a transaction level modeling (TLM) design flow for straightforward embedded system design with SystemC. The goal is to systematically develop both...
FPT
2005
IEEE
14 years 1 months ago
2005
IEEE
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
SUTC
2010
IEEE
13 years 5 months ago
2010
IEEE
—As sensor networks are finding widespread use across many applications, designers increasingly must not only focus on application development, but also on sensor network optimiz...