Sciweavers

18 search results - page 4 / 4
» Systolic Algorithm Mapping for Coarse Grained Reconfigurable...
Sort
View
FCCM
2002
IEEE
171views VLSI» more  FCCM 2002»
14 years 1 months ago
Coarse-Grain Pipelining on Multiple FPGA Architectures
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro...
DATE
2006
IEEE
125views Hardware» more  DATE 2006»
14 years 2 months ago
Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys)
In this paper we analyze a 3D image rendering algorithm and the different mapping schemes to implement it in a SIMD reconfigurable architecture. 3D image render is highly computat...
Javier Davila, Alfonso de Torres, Jose Manuel Sanc...
ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
14 years 3 days ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress