119 search results - page 6 / 24 » Targeting Tiled Architectures in Design Exploration |
ISPASS
2006
IEEE
14 years 1 months ago
2006
IEEE
Detailed microarchitectural simulators are not well suited for exploring large design spaces due to their excessive simulation times. We introduce AXCIS, a framework for fast and ...
FPL
2003
Springer
14 years 23 days ago
2003
Springer
At Leiden Embedded Research Center (LERC), we are building a tool chain called Compaan/Laura that allows us to map fast and efficiently applications written in Matlab onto recon...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Program runtime characteristics exhibit significant variation. As microprocessor architectures become more complex, their efficiency depends on the capability of adapting with wor...
ASPLOS
1994
ACM
13 years 11 months ago
1994
ACM
There is an increasing trend to use commodity microprocessors as the compute engines in large-scale multiprocessors. However, given that the majority of the microprocessors are so...
ANCS
2005
ACM
14 years 1 months ago
2005
ACM
This paper investigates the suitability of emerging tiled-architectures, equipped with low-latency on-chip networks, for high-performance network routing. In this paper, we presen...