54 search results - page 6 / 11 » Teaching Hardware Description and Verification |
CAV
2004
Springer
13 years 11 months ago
2004
Springer
Sequential consistency is the archetypal correctness condition for the memory protocols of shared-memory multiprocessors. Typically, such protocols are parameterized by the number ...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract: This paper addresses the problem of equivalence veriļ¬cation of RTL descriptions that implement arithmetic computations (add, mult, shift) over bitvectors that have diļ¬...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
ā This paper addresses the problem of equivalence veriļ¬cation of RTL descriptions. The focus is on datapathoriented designs that implement polynomial computations over ļ¬xed-s...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Interrupt behaviors, especially the external ones, are difficult to verify in a microprocessor design project in that they involve both interacting hardware and software. This pap...
RCC
2002
13 years 7 months ago
2002
In recent years Arvind's Group at MIT has shown the usefulness of term rewriting theory for the specification of processor architectures. In their approach processors specifi...