Sciweavers

3340 search results - page 140 / 668
» Teaching networking hardware
Sort
View
AICCSA
2006
IEEE
77views Hardware» more  AICCSA 2006»
15 years 7 months ago
Evaluation of Breast Cancer Tumor Classification with Unconstrained Functional Networks Classifier
This paper proposes functional networks as an unconstrained classifier scheme for multivariate data to diagnose the breast cancer tumor. The performance of this new technique is m...
Emad A. El-Sebakhy, Kanaan A. Faisal, Tarek Helmy,...
DATE
2006
IEEE
75views Hardware» more  DATE 2006»
15 years 10 months ago
GALS networks on chip: a new solution for asynchronous delay-insensitive links
In this paper a cost effective solution for asynchronous delay-insensitive on-chip communication is proposed. Our solution is based on the Berger coding scheme and allows to obtai...
G. Campobello, M. Castano, C. Ciofi, Daniele Manga...
MSS
2003
IEEE
113views Hardware» more  MSS 2003»
15 years 9 months ago
Design and Implementation of Multiple Addresses Parallel Transmission Architecture for Storage Area Network
In this paper, we present a parallel transmission architecture for SAN. By using two schedulers on the destination and source addresses of packets, the load of multiple data flows...
Bin Meng, Patrick B. T. Khoo, T. C. Chong
ISPD
1998
ACM
86views Hardware» more  ISPD 1998»
15 years 8 months ago
Calculation of ramp response of lossy transmission lines using two-port network functions
In this paper, we present a new analytical approach for computing the ramp response of an RLC interconnect line with a pure capacitive load. The approach is based on the two-port ...
Payam Heydari, Massoud Pedram
FPL
2009
Springer
105views Hardware» more  FPL 2009»
15 years 8 months ago
Run-time resource management in fault-tolerant network on reconfigurable chips
This paper investigates the challenges of run-time resource management in future coarse-grained network-onreconfigurable-chips (NoRCs). Run-time reconfiguration is a key feature e...
Mohammad Hosseinabady, José L. Nú&nt...