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DATE
2003
IEEE
103views Hardware» more  DATE 2003»
15 years 10 months ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
BSN
2009
IEEE
211views Sensor Networks» more  BSN 2009»
15 years 9 months ago
TEMPO 3.1: A Body Area Sensor Network Platform for Continuous Movement Assessment
— This work presents TEMPO (Technology-Enabled Medical Precision Observation) 3.1, a third generation body area sensor platform that accurately and precisely captures, processes,...
Adam T. Barth, Mark A. Hanson, Harry C. Powell Jr....
ICCAD
2000
IEEE
188views Hardware» more  ICCAD 2000»
15 years 9 months ago
Bus Optimization for Low-Power Data Path Synthesis Based on Network Flow Method
— Sub-micron feature sizes have resulted in a considerable portion of power to be dissipated on the buses, causing an increased attention on savings for power at the behavioral l...
Sungpack Hong, Taewhan Kim
ASPDAC
1998
ACM
81views Hardware» more  ASPDAC 1998»
15 years 9 months ago
A Heuristic Algorithm to Design AND-OR-EXOR Three-Level Networks
—An AND-OR-EXOR network, where the output EXOR gate has only two inputs, is one of the simplest three-level architecture. This network realizes an EXOR of two sum-of-products exp...
Debatosh Debnath, Tsutomu Sasao
ICS
1998
Tsinghua U.
15 years 9 months ago
OPTNET: A Cost-effective Optical Network for Multiprocessors
In this paper we propose the OPTNET, a novel optical network and associated coherence protocol for scalable multiprocessors. The network divides its channels into broadcast and po...
Enrique V. Carrera, Ricardo Bianchini