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CODES
2002
IEEE
14 years 1 months ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia
DATE
2004
IEEE
168views Hardware» more  DATE 2004»
14 years 7 days ago
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing
Energy efficient embedded systems consist of a heterogeneous collection of very specific building blocks, connected together by a complex network of many dedicated busses and inte...
Ingrid Verbauwhede, Patrick Schaumont, Christian P...
IJCSA
2008
104views more  IJCSA 2008»
13 years 8 months ago
Artificial Intelligence and Bluetooth Techniques in a Multi-user M-learning Domain
In this paper we present a practical implementation of a multiuser technical laboratory that combines Artificial Intelligence (AI) and Bluetooth (BT) techniques. The objective is ...
Bonifacio Castaño, Angel Moreno, Melquiades...
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
14 years 2 months ago
An effective technique for minimizing the cost of processor software-based diagnosis in SoCs
The ever increasing usage of microprocessor devices is sustained by a high volume production that in turn requires a high production yield, backed by a controlled process. Fault d...
Paolo Bernardi, Ernesto Sánchez, Massimilia...
ICML
1994
IEEE
14 years 1 days ago
Combining Top-down and Bottom-up Techniques in Inductive Logic Programming
This paper describes a new methodfor inducing logic programs from examples which attempts to integrate the best aspects of existingILP methodsintoa singlecoherent framework. In pa...
John M. Zelle, Raymond J. Mooney, Joshua B. Konvis...