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ARITH
1999
IEEE
13 years 12 months ago
1999
IEEE
Although division is less frequent than addition and multiplication, because of its longer latency it dissipates a substantial part of the energy in floating-point units. In this ...
SASP
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper proposes an energy efficient processor which can be used as a design alternative for the dynamic voltage scaling (DVS) processors in embedded system design. The proces...
ASPDAC
2004
ACM
14 years 1 months ago
2004
ACM
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
ISLPED
1999
ACM
13 years 12 months ago
1999
ACM
While guarded evaluation has proven an effective energy saving technique in arithmetic circuits, good methodologies do not exist for determining when and how to guard for maximal ...
CC
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks ...