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» Technology Mapping for Electrically Programmable Gate Arrays
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FPGA
1998
ACM
160views FPGA» more  FPGA 1998»
13 years 11 months ago
A New Retiming-Based Technology Mapping Algorithm for LUT-based FPGAs
In this paper, we present a new retiming-based technology mapping algorithm for look-up table-based eld programmable gate arrays. The algorithm is based on a novel iterative proce...
Peichen Pan, Chih-Chang Lin
ISCAS
2002
IEEE
141views Hardware» more  ISCAS 2002»
14 years 14 days ago
Power characterization of digital filters implemented on FPGA
The evaluation of power consumption in complex digital systems is a hard task that normally requires long simulation time and complicated models. In this work, we obtain power con...
Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nann...
ISCA
2006
IEEE
114views Hardware» more  ISCA 2006»
13 years 7 months ago
Using System-on-a-Programmable-Chip Technology to Design Embedded Systems
This paper describes the tools, techniques, and devices used to design embedded products with system
James O. Hamblen, Tyson S. Hall
DAC
2005
ACM
13 years 9 months ago
Exploring technology alternatives for nano-scale FPGA interconnects
Field Programmable Gate Arrays (FPGAs) are becoming increasingly popular. With their regular structures, they are particularly amenable to scaling to smaller technologies. On the ...
Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane I...
FPL
2001
Springer
92views Hardware» more  FPL 2001»
14 years 1 days ago
Secure Configuration of Field Programmable Gate Arrays
Although SRAM programmed Field Programmable Gate Arrays (FPGA's) have come to dominate the industry due to their density and performance advantages over non-volatile technolog...
Tom Kean