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ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
16 years 14 days ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
ASPLOS
2010
ACM
15 years 10 months ago
Shoestring: probabilistic soft error reliability on the cheap
Aggressive technology scaling provides designers with an ever increasing budget of cheaper and faster transistors. Unfortunately, this trend is accompanied by a decline in individ...
Shuguang Feng, Shantanu Gupta, Amin Ansari, Scott ...
142
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IEEEPACT
2008
IEEE
15 years 10 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
IOLTS
2007
IEEE
155views Hardware» more  IOLTS 2007»
15 years 9 months ago
On Derating Soft Error Probability Based on Strength Filtering
— Soft errors caused by ionizing radiation have emerged as a major concern for current generation of CMOS technologies and the trend is expected to get worse. A significant frac...
Alodeep Sanyal, Sandip Kundu
DAWAK
2007
Springer
15 years 9 months ago
Mining Top-K Multidimensional Gradients
Several business applications such as marketing basket analysis, clickstream analysis, fraud detection and churning migration analysis demand gradient data analysis. By employing g...
Ronnie Alves, Orlando Belo, Joel Ribeiro