—Test application at reduced power supply voltage (low-voltage testing) or reduced temperature (low-temperature testing) can improve the defect coverage of a test set, particular...
Sandip Kundu, Piet Engelke, Ilia Polian, Bernd Bec...
Estimation of static and dynamic energy of caches is critical for high-performance low-power designs. Commercial CAD tools performing energy estimation statically are not aware of...
Shrikanth Ganapathy, Ramon Canal, Antonio Gonz&aac...
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
Ashish Kumar Singh, Ku He, Constantine Caramanis, ...
Polymorphic electronics provides a new way for obtaining circuits that are able to perform two or more functions depending on the environment in which they operate. These function...
As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC p...
Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vi...