179 search results - page 19 / 36 » Temperature-aware global placement |
CIAC
2000
Springer
13 years 11 months ago
2000
Springer
We consideralgorithms for a simple one-dimensionalpoint placement problem: given N points on a line, and noisy measurements of the distances between many pairs of them, estimate th...
ASPDAC
1998
ACM
13 years 11 months ago
1998
ACM
ABSTRACT - This paper presents a new design flow, FPDSiMPA, and a set of techniques for synthesizing high-performance sub-half micron logic circuits. FPD-SiMPA consists of logic p...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—In modern sub-micron design, achieving low-skew clock distributions is facing challenges for high-performance circuits. Symmetric global clock distribution and clock tree synthe...
DAC
2000
ACM
13 years 11 months ago
2000
ACM
—Chemical–mechanical polishing (CMP) is an enabling technique used in deep-submicrometer VLSI manufacturing to achieve long range oxide planarization. Post-CMP oxide topography...
IEEEPACT
2000
IEEE
13 years 11 months ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...