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» Temperature-aware global placement
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SLIP
2009
ACM
16 years 2 days ago
Floorplan-based FPGA interconnect power estimation in DSP circuits
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...
Ruzica Jevtic, Carlos Carreras, Vukasin Pejovic
177
Voted
DATE
2008
IEEE
132views Hardware» more  DATE 2008»
16 years 1 days ago
Coarse-Grain MTCMOS Sleep Transistor Sizing Using Delay Budgeting
Power gating is one of the most effective techniques in reducing the standby leakage current of VLSI circuits. In this paper we introduce a new approach for sleep transistor sizin...
Ehsan Pakbaznia, Massoud Pedram
ESCIENCE
2007
IEEE
15 years 12 months ago
Intelligent Selection of Fault Tolerance Techniques on the Grid
The emergence of computational grids has lead to an increased reliance on task schedulers that can guarantee the completion of tasks that are executed on unreliable systems. There...
Daniel C. Vanderster, Nikitas J. Dimopoulos, Randa...
134
Voted
CP
2007
Springer
15 years 11 months ago
A Generic Geometrical Constraint Kernel in Space and Time for Handling Polymorphic k-Dimensional Objects
: This report introduces a geometrical constraint kernel for handling the location in space and time of polymorphic k-dimensional objects subject to various geometrical and time co...
Nicolas Beldiceanu, Mats Carlsson, Emmanuel Poder,...
LCPC
2007
Springer
15 years 11 months ago
A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor
This paper describes the implementation of a runtime library for asynchronous communication in the Cell BE processor. The runtime library implementation provides with several servi...
Jairo Balart, Marc González, Xavier Martore...