Sciweavers

4345 search results - page 819 / 869
» Temporal Constraint Networks
Sort
View
FPGA
1997
ACM
149views FPGA» more  FPGA 1997»
13 years 11 months ago
Signal Processing at 250 MHz Using High-Performance FPGA's
This paper describes an application in high-performance signal processing using reconfigurable computing engines: a 250 MHz cross-correlator for radio astronomy. Experimental resu...
Brian Von Herzen
ICS
1994
Tsinghua U.
13 years 11 months ago
Fault-tolerant wormhole routing in tori
Abstract. We present a method to enhance wormhole routing algorithms for deadlock-free fault-tolerant routing in tori. We consider arbitrarily-located faulty blocks and assume only...
Suresh Chalasani, Rajendra V. Boppana
ASPDAC
2009
ACM
141views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures
Abstract-- The increasing wire delay constraints in deep submicron VLSI designs have led to the emergence of scalable and modular Network-on-Chip (NoC) architectures. As the power ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri...
EATIS
2007
ACM
13 years 11 months ago
Analysing and enhancing business processes and IT-systems for mobile workforce automation: a framework approach
Mobile B2E-applications (business-to-employee) can add significant value to a company's business, when large workforce divisions are involved in the execution of certain busi...
Volker Gruhn, André Köhler
COMPSAC
2009
IEEE
13 years 11 months ago
Tamper Resistance for Software Defined Radio Software
The security of software defined radio (SDR) software is essential to the trustworthiness of the overall radio system. When designing and developing security solutions for SDR sof...
Shucai Xiao, Jung-Min Park, Yanzhu Ye