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» Termination of Integer Linear Programs
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ASPDAC
2006
ACM
134views Hardware» more  ASPDAC 2006»
14 years 3 months ago
Constraint driven I/O planning and placement for chip-package co-design
System-on-chip and system-in-package result in increased number of I/O cells and complicated constraints for both chip designs and package designs. This renders the traditional ma...
Jinjun Xiong, Yiu-Chung Wong, Egino Sarto, Lei He
CGO
2005
IEEE
14 years 2 months ago
A Progressive Register Allocator for Irregular Architectures
Register allocation is one of the most important optimizations a compiler performs. Conventional graphcoloring based register allocators are fast and do well on regular, RISC-like...
David Koes, Seth Copen Goldstein
DATE
2005
IEEE
146views Hardware» more  DATE 2005»
14 years 2 months ago
Nonuniform Banking for Reducing Memory Energy Consumption
Main memories can consume a large percentage of overall energy in many data-intensive embedded applications. The past research proposed and evaluated memory banking as a possible ...
Ozcan Ozturk, Mahmut T. Kandemir
QSHINE
2005
IEEE
14 years 2 months ago
Link Scheduling with Power Control for Throughput Enhancement in Multihop Wireless Networks
Abstract— Throughput is an important performance consideration for multihop wireless networks. In this paper, we study the joint link scheduling and power control problem, focusi...
Jian Tang, Guoliang Xue, Christopher Chandler, Wei...
DAC
2004
ACM
14 years 2 months ago
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
Philip Brisk, Adam Kaplan, Majid Sarrafzadeh