Recently, a number of works have been published on implementing assignment decision diagram models combined with SAT methods to address register-transfer level test pattern genera...
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...
Excessive switching activity during scan testing can cause average power dissipation and peak power during test to be much higher than during normal operation. This can cause prob...
Ranganathan Sankaralingam, Rama Rao Oruganti, Nur ...
The verification of modern computing systems has grown to dominate the cost of system design, often with limited success as designs continue to be released with latent bugs. This t...
One of the main challenges in distributed development is ensuring effective communication and coordination among the distributed teams. In this context, little attention has been ...
Mark Grechanik, James A. Jones, Alessandro Orso, A...