203 search results - page 10 / 41 » Test Generation and Fault Localization for Quantum Circuits |
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Test generation procedures attempt to assign values to the inputs of a circuit so as to detect target faults. We study a complementary view whereby the goal is to identify values ...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
There has been considerable research on quantum dots cellular automata as a new computing scheme in the nano-scale regimes. The basic logic element of this technology is a majorit...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
— We propose an automatic test pattern generation (ATPG) framework for combinational threshold networks. The motivation behind this work lies in the fact that many emerging nanot...
DSD
2005
IEEE
14 years 1 months ago
2005
IEEE
Current paper presents new alternatives for accelerating the task of fault simulation for sequential circuits by hardware emulation on FPGA. Fault simulation is an important subta...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper presents a scalable method to generate close to minimal size test pattern sets for stuck-at faults in scan based circuits. The method creates sets of potentially compat...