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» Test Generation and Fault Localization for Quantum Circuits
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VTS
1996
IEEE
126views Hardware» more  VTS 1996»
13 years 11 months ago
Automatic test generation using genetically-engineered distinguishing sequences
A fault-oriented sequential circuit test generator is described in which various types of distinguishing sequences are derived, both statically and dynamically, to aid the test ge...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
EURODAC
1994
IEEE
130views VHDL» more  EURODAC 1994»
13 years 11 months ago
RESIST: a recursive test pattern generation algorithm for path delay faults
This paper presents Resist, a recursive test pattern generation (TPG) algorithm for path delay fault testing of scan-based circuits. In contrast to other approaches, it exploits t...
Karl Fuchs, Michael Pabst, Torsten Rössel
ATS
1996
IEEE
117views Hardware» more  ATS 1996»
13 years 11 months ago
Hierarchical Test Generation with Built-In Fault Diagnosis
A hierarchical test generation method is presented that uses the inherent hierarchical structure of the circuit under test and takes fault diagnosability into account right from t...
Dirk Stroobandt, Jan Van Campenhout
ET
1998
52views more  ET 1998»
13 years 7 months ago
Scalable Test Generators for High-Speed Datapath Circuits
This paper explores the design of efficient test sets and test-pattern generators for online BIST. The target applications are high-performance, scalable datapath circuits for whi...
Hussain Al-Asaad, John P. Hayes, Brian T. Murray