1016 search results - page 35 / 204 » Test Generation for Designs with On-Chip Clock Generators |
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Functional verification of systems is aimed at validating the integration of previously verified components. It deals with complex designs, and invariably suffers from scarce re...
ISQED
2002
IEEE
14 years 18 days ago
2002
IEEE
The design methods and the automation of the comparator circuit layout generation for a flash A/D converter are presented in this paper. The threshold inverter quantization (TIQ)...
APCCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper considers z-domain transfer functions whose denominator polynomial possesses the property that the coefficient of zi is greater than the coefficient of zi-1 . Such trans...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...