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ISLPED
2010
ACM
169views Hardware» more  ISLPED 2010»
13 years 5 months ago
Distributed DVFS using rationally-related frequencies and discrete voltage levels
Abstract--As a replacement for the fast-fading GloballySynchronous model, we have defined a flexible design style called GRLS, for Globally-Ratiochronous, Locally-Synchronous, whic...
Jean-Michel Chabloz, Ahmed Hemani
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
14 years 1 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
ASYNC
2003
IEEE
86views Hardware» more  ASYNC 2003»
14 years 1 months ago
A High-Speed Clockless Serial Link Transceiver
We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Serial link transceivers achieve high offchip data rates by ...
John Teifel, Rajit Manohar
ASYNC
2000
IEEE
107views Hardware» more  ASYNC 2000»
14 years 5 days ago
AMULET3i - An Asynchronous System-on-Chip
AMULET3i is the third generation asynchronous ARMcompatible microprocessor subsystem developed at the University of Manchester. It is internally modular, being based around the MA...
Jim D. Garside, W. J. Bainbridge, Andrew Bardsley,...
DAC
2006
ACM
14 years 8 months ago
Elmore model for energy estimation in RC trees
This paper presents analysis methods for energy estimation in RC trees driven by time-varying voltage sources, e.g., buffers, timevarying power supplies, and resonant clock genera...
Quming Zhou, Kartik Mohanram