1016 search results - page 84 / 204 » Test Generation for Designs with On-Chip Clock Generators |
ETFA
2006
IEEE
14 years 3 months ago
2006
IEEE
Abstract— This work deals with the control and the observation of a remote system using Internet as a communication line. The process consists in a Slave part S, with poor comput...
ICCD
1992
IEEE
14 years 1 months ago
1992
IEEE
We describe a new synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple input change fundamental m...
ISLPED
1995
ACM
14 years 17 days ago
1995
ACM
A dual-rail CMOS adiabatic switching circuit approach is described which follows the electroid model of Hall. These circuits can operate in either the retractile cascade or the re...
TVLSI
2008
13 years 9 months ago
2008
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
LCTRTS
2009
Springer
14 years 3 months ago
2009
Springer
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...