145 search results - page 6 / 29 » Test Resource Partitioning and Optimization for SOC Designs |
DELTA
2008
IEEE
14 years 3 months ago
2008
IEEE
The advances of CMOS technology towards 45 nm, the high costs of ASIC design, power limitations and fast changing application requirements have stimulated the usage of highly reco...
DDECS
2007
IEEE
14 years 2 months ago
2007
IEEE
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
DATE
2004
IEEE
14 years 9 days ago
2004
IEEE
The increasing complexity of system-on-chip (SOC) integrated circuits has spurred the development of versatile automatic test equipment (ATE) that can simultaneously drive differe...
PDCAT
2004
Springer
14 years 1 months ago
2004
Springer
Abstract. This paper proposes a simplified simultaneous multithreading (SMT) architecture aiming at CPU cores of embedded SoCs for consumer applications. This architecture reduces...
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
— In this paper, we are proposing a core-based test methodology that utilizes the functional bus for test stimuli and response transportation. An efficient algorithm for the gen...