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» Test Resource Partitioning and Optimization for SOC Designs
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ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
14 years 2 months ago
A 52mW 1200MIPS compact DSP for multi-core media SoC
- This paper presents a DSP core for multi-core media SoC, which is optimized to execute a set of signal processing tasks very efficiently. The fully-programmable core has a data-c...
Shih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting ...
ARCS
2010
Springer
13 years 12 months ago
A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems
Power and resource management are key goals for the success of modern battery-supplied multimedia devices. This kind of devices are usually based on SoCs with a wide range of subsy...
Patrick Bellasi, William Fornaciari, David Siorpae...
VTS
2002
IEEE
106views Hardware» more  VTS 2002»
14 years 1 months ago
How Effective are Compression Codes for Reducing Test Data Volume?
Run-length codes and their variants have recently been shown to be very effective for compressing system-on-achip (SOC) test data. In this paper, we analyze the Golomb code, the c...
Anshuman Chandra, Krishnendu Chakrabarty, Rafael A...
FPGA
1998
ACM
132views FPGA» more  FPGA 1998»
14 years 24 days ago
Circuit Partitioning with Complex Resource Constraints in FPGAs
In this paper, we present an algorithm for circuit partitioning with complex resource constraints in large FPGAs. Traditional partitioning methods estimate the capacity of an FPGA...
Huiqun Liu, Kai Zhu, D. F. Wong
ICCD
2005
IEEE
129views Hardware» more  ICCD 2005»
14 years 5 months ago
Temperature-Aware Voltage Islands Architecting in System-on-Chip Design
As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC p...
Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vi...