142 search results - page 3 / 29 » Test architecture design and optimization for three-dimensio... |
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded...
CCECE
2006
IEEE
14 years 1 months ago
2006
IEEE
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
ATS
2001
IEEE
13 years 11 months ago
2001
IEEE
Test access is a major problem for core-based systemon-chip (SOC) designs. Since cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms...