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ATS
2004
IEEE
126views Hardware» more  ATS 2004»
13 years 11 months ago
Alternative Run-Length Coding through Scan Chain Reconfiguration for Joint Minimization of Test Data Volume and Power Consumptio
Test data volume and scan power are two major concerns in SoC test. In this paper we present an alternative run-length coding method through scan chain reconfiguration to reduce b...
Youhua Shi, Shinji Kimura, Nozomu Togawa, Masao Ya...
ECBS
2011
IEEE
197views Hardware» more  ECBS 2011»
12 years 7 months ago
Finding Interaction Faults Adaptively Using Distance-Based Strategies
Abstract—Software systems are typically large and exhaustive testing of all possible input parameters is usually not feasible. Testers select tests that they anticipate may catch...
Renée C. Bryce, Charles J. Colbourn, D. Ric...
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
14 years 29 days ago
Linearity Testing of Precision Analog-to-Digital Converters Using Stationary Nonlinear Inputs
As the performance of Analog-to-Digital Converters continues to improve, it is becoming more challenging and costly to develop sufficiently fast and low-drift signal generators th...
Le Jin, Kumar L. Parthasarathy, Turker Kuyel, Dega...
VLSID
1996
IEEE
110views VLSI» more  VLSID 1996»
13 years 12 months ago
On test coverage of path delay faults
W epropose a coverage metric and a two-pass test generation method for path delay faults in combinational logic circuits. The coverage is measured for each line with a rising and ...
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vi...