Sciweavers

244 search results - page 24 / 49
» Testing Digital Circuits with Constraints
Sort
View
146
Voted
CVPR
2005
IEEE
16 years 5 months ago
Digital Tapestry
This paper addresses the novel problem of automatically synthesizing an output image from a large collection of different input images. The synthesized image, called a digital tap...
Carsten Rother, Sanjiv Kumar, Vladimir Kolmogorov,...
ISLPED
1997
ACM
96views Hardware» more  ISLPED 1997»
15 years 7 months ago
Re-mapping for low power under tight timing constraints
In this paper1 we propose a novel approach to synthesis for low power under tight timing constraints. Starting from a mapped netlist, we apply a powerful generalized matching algo...
Patrick Vuillod, Luca Benini, Giovanni De Micheli
111
Voted
ISLPED
2006
ACM
129views Hardware» more  ISLPED 2006»
15 years 9 months ago
Variation-driven device sizing for minimum energy sub-threshold circuits
Sub-threshold operation is a compelling approach for energyconstrained applications, but increased sensitivity to variation must be mitigated. We explore variability metrics and t...
Joyce Kwong, Anantha P. Chandrakasan
DAC
2007
ACM
16 years 4 months ago
Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement
Negative bias temperature instability (NBTI) in MOSFETs is one of the major reliability challenges in nano-scale technology. This paper presents an efficient technique to characte...
Kunhyuk Kang, Kee-Jong Kim, Ahmad E. Islam, Muhamm...
ICCAD
2008
IEEE
122views Hardware» more  ICCAD 2008»
16 years 5 days ago
Network flow-based power optimization under timing constraints in MSV-driven floorplanning
Abstract— Power consumption has become a crucial problem in modern circuit design. Multiple Supply Voltage (MSV) design is introduced to provide higher flexibility in controllin...
Qiang Ma, Evangeline F. Y. Young