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» Testing Digital Circuits with Constraints
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GLVLSI
2006
IEEE
193views VLSI» more  GLVLSI 2006»
14 years 3 months ago
Optimizing noise-immune nanoscale circuits using principles of Markov random fields
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
CODES
2005
IEEE
14 years 3 months ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
ISSTA
2009
ACM
14 years 4 months ago
Precise pointer reasoning for dynamic test generation
Dynamic test generation consists of executing a program while gathering symbolic constraints on inputs from predicates encountered in branch statements, and of using a constraint ...
Bassem Elkarablieh, Patrice Godefroid, Michael Y. ...
VTS
2000
IEEE
114views Hardware» more  VTS 2000»
14 years 2 months ago
Detection of CMOS Defects under Variable Processing Conditions
Transient Signal Analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points. In this paper, the power supply transient...
Amy Germida, James F. Plusquellic
ISCAS
2006
IEEE
85views Hardware» more  ISCAS 2006»
14 years 3 months ago
Analog frequency response measurement in mixed-signal systems
—We present an efficient approach for on-chip frequency response measurement, including phase and gain, of analog circuitry in mixed-signal systems. The approach uses direct digi...
Charles E. Stroud, Dayu Yang, Foster F. Dai