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ACSD
2001
IEEE
102views Hardware» more  ACSD 2001»
14 years 19 days ago
Exploration Testing
This paper describes a new way of testing reactive systems as investigated by the RATE-project at the Tampere University of Technology. We abandon the idea of systematically using...
Juhana Helovuo, Sari Leppänen
DATE
2006
IEEE
94views Hardware» more  DATE 2006»
14 years 3 months ago
Reuse-based test access and integrated test scheduling for network-on-chip
In this paper, we propose a new method for test access and test scheduling in NoC-based system. It relies on a progressive reuse of the network resources for transporting test dat...
Chunsheng Liu, Zach Link, Dhiraj K. Pradhan
ISQED
2003
IEEE
85views Hardware» more  ISQED 2003»
14 years 2 months ago
Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets
An algorithm for mapping core terminals to System-On-a-Chip (SOC) I/O pins and scheduling tests in order to achieve costefficient concurrent test for core-based designs is present...
Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanja...
DELTA
2008
IEEE
14 years 3 months ago
AES-Based BIST: Self-Test, Test Pattern Generation and Signature Analysis
Re-using embedded resources for implementing builtin self test mechanisms allows test cost reduction. In this paper we demonstrate how to implement costefficient built-in self tes...
M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre
ISSTA
1989
ACM
14 years 1 months ago
Estimating the Number of Test Cases Required to Satisfy the All-du-paths Testing Criterion
The all-du-paths software testing criterion is the most discriminating of the data ow testing criteria of Rapps and Weyuker. Unfortunately, in the worst case, the criterion requir...
James M. Bieman, J. Schultz