1610 search results - page 26 / 322 » Testing Patterns |
VTS
1999
IEEE
14 years 2 months ago
1999
IEEE
High-level test pattern generation is today a widely investigated research topic. The present paper proposes a fully automated, simulation-based ATPG system, to address test patte...
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
Domino circuits have been used in most modern high-performance microprocessor designs because of their high speed, low transistor-count and hazard-free operation. However, with te...
CIARP
2005
Springer
14 years 3 months ago
2005
Springer
VTS
2000
IEEE
14 years 2 months ago
2000
IEEE
We propose a novel BIST technique for non-scan sequential circuits which does not modify the circuit under test. It uses a learning algorithm to build a hardware test sequence gen...
ITC
1997
IEEE
14 years 2 months ago
1997
IEEE
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...