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ITC
2000
IEEE
84views Hardware» more  ITC 2000»
14 years 1 months ago
Non-intrusive BIST for systems-on-a-chip
1 The term "functional BIST" describes a test method to control functional modules so that they generate a deterministic test set, which targets structural faults within ...
Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wund...
BMCBI
2006
118views more  BMCBI 2006»
13 years 10 months ago
Identification of gene expression patterns using planned linear contrasts
Background: In gene networks, the timing of significant changes in the expression level of each gene may be the most critical information in time course expression profiles. With ...
Hao Li, Constance L. Wood, Yushu Liu, Thomas V. Ge...
AAAI
2010
13 years 10 months ago
Computing Cost-Optimal Definitely Discriminating Tests
The goal of testing is to discriminate between multiple hypotheses about a system--for example, different fault diagnoses--by applying input patterns and verifying or falsifying t...
Anika Schumann, Jinbo Huang, Martin Sachenbacher
DATE
2003
IEEE
90views Hardware» more  DATE 2003»
14 years 3 months ago
Extending JTAG for Testing Signal Integrity in SoCs
As the technology is shrinking and the working frequency is going into multi gigahertz range, the issues related to interconnect testing are becoming more dominant. Specifically,...
Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nour...
ASPDAC
2009
ACM
262views Hardware» more  ASPDAC 2009»
14 years 4 months ago
Fault modeling and testing of retention flip-flops in low power designs
Low power circuits have become a necessary part in modern designs. Retention flip-flop is one of the most important components in low power designs. Conventional test methodologie...
Bing-Chuan Bai, Augusli Kifli, Chien-Mo James Li, ...