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ICCAD
2004
IEEE
101views Hardware» more  ICCAD 2004»
14 years 4 months ago
Frugal linear network-based test decompression for drastic test cost reductions
— In this paper we investigate an effective approach to construct a linear decompression network in the multiple scan chain architecture. A minimal pin architecture, complemented...
Wenjing Rao, Alex Orailoglu, G. Su
SE
2007
13 years 9 months ago
Requirements traceability in the model-based testing process
: Automated test case and test driver generation from a precise behaviour UML model is an emerging approach for software functional validation. This innovative approach for validat...
Eddy Bernard, Bruno Legeard
ICSE
2003
IEEE-ACM
14 years 7 months ago
Constructing Test Suites for Interaction Testing
Software system faults are often caused by unexpected interactions among components. Yet the size of a test suite required to test all possible combinations of interactions can be...
Myra B. Cohen, Peter B. Gibbons, Warwick B. Mugrid...
VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
14 years 8 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
DATE
2008
IEEE
126views Hardware» more  DATE 2008»
13 years 9 months ago
State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores
1 We present a new type of Linear Feedback Shift Registers, State Skip LFSRs. State Skip LFSRs are normal LFSRs with the addition of a small linear circuit, the State Skip circuit,...
V. Tenentes, Xrysovalantis Kavousianos, Emmanouil ...