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» Testing embedded-core based system chips
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SBCCI
2004
ACM
117views VLSI» more  SBCCI 2004»
14 years 25 days ago
Reducing test time with processor reuse in network-on-chip based systems
This paper proposes a test planning method capable of reusing available processors as test sources and sinks, and the on-chip network as the access mechanism for the test of cores...
Alexandre M. Amory, Érika F. Cota, Marcelo ...
ISVLSI
2007
IEEE
181views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Code-coverage Based Test Vector Generation for SystemC Designs
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
Alair Dias Jr., Diógenes Cecilio da Silva J...
ISCAS
2006
IEEE
135views Hardware» more  ISCAS 2006»
14 years 1 months ago
A sensor system on chip for wireless microsystems
Recent years have seen the rapid development of microsensor technology, system on chip design, wireless technology and ubiquitous computing. When assembled into a complex microsys...
L. Wang, Nizamettin Aydin, A. Astaras, M. Ahmadian...
TCAD
2008
103views more  TCAD 2008»
13 years 7 months ago
Using Transfer-Resource Graph for Software-Based Verification of System-on-Chip
The verification of a system-on-chip is challenging due to its high level of integration. Multiple components in a system can behave concurrently and compete for resources. Hence, ...
Xiaoxi Xu, Cheng-Chew Lim
BMCBI
2011
13 years 2 months ago
The dChip survival analysis module for microarray data
Background: Genome-wide expression signatures are emerging as potential marker for overall survival and disease recurrence risk as evidenced by recent commercialization of gene ex...
Samir B. Amin, Parantu K. Shah, Aimin Yan, Sophia ...