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» Testing implementations of transactional memory
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IPPS
2008
IEEE
14 years 2 months ago
A deterministic multi-way rendezvous library for haskell
The advent of multicore processors requires mainstream concurrent programming languages with high level concurrency constructs and effective debugging techniques. Unfortunately, m...
Nalini Vasudevan, Satnam Singh, Stephen A. Edwards
ISCA
2006
IEEE
142views Hardware» more  ISCA 2006»
14 years 1 months ago
Bulk Disambiguation of Speculative Threads in Multiprocessors
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
Luis Ceze, James Tuck, Josep Torrellas, Calin Casc...
DTJ
1998
171views more  DTJ 1998»
13 years 7 months ago
Measurement and Analysis of C and C++ Performance
ir increasing use of abstraction, modularity, delayed binding, polymorphism, and source reuse, especially when these attributes are used in combination. Modern processor architectu...
Hemant G. Rotithor, Kevin W. Harris, Mark W. Davis
AOSD
2012
ACM
12 years 3 months ago
Reusing non-functional concerns across languages
Emerging languages are often source-to-source compiled to mainstream ones, which offer standardized, fine-tuned implementations of non-functional concerns (NFCs)—including pers...
Myoungkyu Song, Eli Tilevich
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
14 years 8 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima