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DAC
2010
ACM
13 years 11 months ago
TSV stress aware timing analysis with applications to 3D-IC layout optimization
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee,...
AUTOMATICA
1999
122views more  AUTOMATICA 1999»
13 years 7 months ago
Set-valued methods for linear parameter varying systems,
We consider stability analysis and state feedback synthesis for Linear Parameter Varying (LPV) systems. LPV systems are de"ned as linear systems whose dynamics depend on exog...
Jeff S. Shamma, Dapeng Xiong
CVPR
2010
IEEE
14 years 3 months ago
Towards Internet-scale Multi-view Stereo
This paper introduces an approach for enabling existing multi-view stereo methods to operate on extremely large unstructured photo collections. The main idea is to decompose the c...
Yasutaka Furukawa, Steve Seitz, Richard Szeliski
ESCIENCE
2006
IEEE
14 years 1 months ago
An Extended Extremal Optimisation Model for Parallel Architectures
: A relatively new meta-heuristic, known as extremal optimisation (EO), is based on the evolutionary science notion that poorly performing genes of an individual are replaced by ra...
Marcus Randall, Andrew Lewis
DAC
1996
ACM
13 years 11 months ago
A Parallel Precorrected FFT Based Capacitance Extraction Program for Signal Integrity Analysis
In order to optimize interconnect to avoid signal integrity problems, very fast and accurate 3-D capacitance extraction is essential. Fast algorithms, such as the multipole or prec...
Narayan R. Aluru, V. B. Nadkarni, James White