1618 search results - page 93 / 324 » Testing random number generators |
DATE
2004
IEEE
15 years 6 months ago
2004
IEEE
This paper presents 3LSSD, a novel, easilyautomatable approach for scan insertion and ATPG of asynchronous circuits. 3LSSD inserts scan latches only into global circuit feedback p...
94
Voted
ACL
2010
15 years 14 days ago
2010
We present a probabilistic model extension to the Tesni`ere Dependency Structure (TDS) framework formulated in (Sangati and Mazza, 2009). This representation incorporates aspects ...
106
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DATE
2008
IEEE
15 years 9 months ago
2008
IEEE
This paper presents a time-domain jitter expansion technique for high-speed digital bit sequence jitter testing. While jitter expansion has been applied to phase noise measurement...
121
Voted
ETS
2006
IEEE
15 years 8 months ago
2006
IEEE
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applie...
127
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CTRSA
2009
Springer
15 years 9 months ago
2009
Springer
Abstract. A redactable signature scheme for a string of objects supports verification even if multiple substrings are removed from the original string. It is important that the re...