Sciweavers

1618 search results - page 93 / 324
» Testing random number generators
Sort
View
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
14 years 1 months ago
Automatic Scan Insertion and Pattern Generation for Asynchronous Circuits
This paper presents 3LSSD, a novel, easilyautomatable approach for scan insertion and ATPG of asynchronous circuits. 3LSSD inserts scan latches only into global circuit feedback p...
Aristides Efthymiou, Christos P. Sotiriou, Douglas...
ACL
2010
13 years 8 months ago
A Probabilistic Generative Model for an Intermediate Constituency-Dependency Representation
We present a probabilistic model extension to the Tesni`ere Dependency Structure (TDS) framework formulated in (Sangati and Mazza, 2009). This representation incorporates aspects ...
Federico Sangati
DATE
2008
IEEE
122views Hardware» more  DATE 2008»
14 years 4 months ago
Digital bit stream jitter testing using jitter expansion
This paper presents a time-domain jitter expansion technique for high-speed digital bit sequence jitter testing. While jitter expansion has been applied to phase noise measurement...
Hyun Choi, Abhijit Chatterjee
ETS
2006
IEEE
110views Hardware» more  ETS 2006»
14 years 4 months ago
Deterministic Logic BIST for Transition Fault Testing
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applie...
Valentin Gherman, Hans-Joachim Wunderlich, Jü...
CTRSA
2009
Springer
128views Cryptology» more  CTRSA 2009»
14 years 4 months ago
Short Redactable Signatures Using Random Trees
Abstract. A redactable signature scheme for a string of objects supports verification even if multiple substrings are removed from the original string. It is important that the re...
Ee-Chien Chang, Chee Liang Lim, Jia Xu